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時間:2011-03-30 06:50來源:藍天飛行翻譯 作者:航空
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I.  A power interruption during BITE will not void the testing already completed. Internal memory flags are set as BITE testing progresses, when a electrical power interrupt occurs, testing is restarted at the library test in progress at the point of interruption.
J.  Several tests require operation of MCP switches and controls. When this is requested, press switches and operate controls as they would be used in actual operation. Rapid operation will cause test failure.
K.  System initialization steps do not normally request a yes/no response, however, after the requested action has been done a yes (ENG) response is required to step the system to the next action.
5C9 
22-11-01 Page 62  BOEING PROPRIETARY - Copyright . - Unpublished Work - See title page for details.  Jun 20/83 


H19164
580  PDC CDU Bite Control Diagram 
May 20/82  Figure 14  22-11-01 
Page 63 
BOEING PROPRIETARY - Copyright . - Unpublished Work - See title page for details. 


K.  Continuous Monitoring
(1)  
Continuous monitoring is provided to deactivate the autopilot and flight director functions if faults occur which could result in suspect processing of digital control and guidance computations. However, fault reaction is inhibited for ac and dc failures and during dual analog control of the airplane with dual monitors active. Storage of faults is provided to enable expeditious troubleshooting and maintenance corrective action.

(2)  
Detected faults are checked to determine if the fault should be stored in RAM. If the storage routine. The data is stored in a push-down linear stack arrangement so that 10 flight segments are always retained. Data is lost from the bottom of the stack on a first-in, first-out basis, and is displayed on last in, first out basis. Each fault code stored is annotated with an alphabetic code indicating the status at the time of the fault occurrence (Fig. 15). The code ‘A’ represents the autopilot was engaged, ‘F’ the flight director was engaged and ‘D’, both were disengaged. If, within the same flight segment a failure is intermittent and repeats, the fault code annotation will be prioritized in the order given above. Therefore, if the fault occurred initially with F/D engaged and then A/P engaged an ‘A’ would appear on the bottom row with the fault identification code.

(3)  
Continuous monitoring readouts are accessed by selecting the AP/FD BITE page (5-5) on the PDC CDU 9step 16.D.). The PDC CDU CLR switch is pressed and 300 entered via CDU keyboard. The fault for the previous flight segment is displayed as described in Fig.

15. Pressing ENG cycles the flight segment to 2 and can be repeated to check all 10 segments. The respective faults are coded but are used to track computer failure for system analysis.

(4)  
Due to the volatile nature of the RAM memory, if the battery bus supply power is interrupted, or switched off, it is necessary to provide a means of clearing the CM storage locations. This clearing process occurs if the ac power is applied within 15 seconds of the application of battery bus 28-vdc power, or by a 1-second or longer removal of battery bus power after application of the ac power. A third method of clearing, through the PDC-CDU is provided by pressing the ENT button three times. This clears RAM, and BITE jumps out of CM display feature.

(5)  
Error code messages trapped by the continuous monitoring diagnostic routine can be retained. An external 6-volt battery is attached to the front J6 connector. The battery (+) lead is connected to front test connector J6 pins 76 and 12 and (-) to pin 1. This battery holds up the RAM memory so that the error contents of the continuous monitoring linear stack can be accessed in the maintenance shop.

(6)  
The following functions are monitored: Tests a) thru f) are considered foreground tests and g) thru I) are background tests (Fig. 15).

(a)  
End Around Digital/Analog-Analog (D/A-A/D) Wrap (E A)

1)  The purpose of the end around test is to verify that an analog output is within an allowable tolerance, within a specified time period. A known digital value is stored and the same value cycled through the D/A and A/D wraparound. The results are compared to the original value to verify input/output processing

(b)  
Autopilot Disconnect (A P)

1)  The purpose of the autopilot disengage test is to validate the ability to disengage the FCC without actually disengaging the unit. This is accomplished by outputting a discrete word containing the autopilot disengage discrete, set to the state to disengage the FCC. If the test confirms the logic state to disengage during a time delay period, then the program continues and the output disengage discrete goes to the normal state. If the disengage discrete logic is not detected then the program jumps to the restart location and stores the error code.
 
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