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BOEING PROPRIETARY - Copyright (C) - Unpublished Work - See title page for details.
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747-400 MAINTENANCE MANUAL
The BCU provides an external power ready signal that is used by
 the other BCU control functions when determining if external
 power is of acceptable quality. The external power ready
 signal is present in the BCU when external power is connected
 to the airplane and there are no external power protective
 trips.
External Power Protection
 1) Overvoltage (OV) Protection a) Overvoltage protection is accomplished by sampling the external power phases A, B, and C. The OV condition exists when the highest of the 3-phase voltages is greater than the OV threshold. The 3-phase minimum actuating level for an OV protective trip is 125 volts ac for frequency between 350 and 440 Hz. When the OV condition is detected, a timer function is implemented based on the amount of OV. As the amount of OV increases, the time between the fault occurrence and the protective trip decreases. An OV condition de-energizes the XPC, GSSR, GSTR, and GHR-XP.
 2) Undervoltage (UV) Protection a) Undervoltage protection is accomplished by sampling the average of 3-phase external power voltages. The UV condition exists when 3-phase average external power voltage is less than 104.5 |1.5 volts ac for a frequency between 350 and 440 Hz. When this condition exists, UV protective function de-energizes the XPC, GSSR, GSTR, and GHR-XP after 9 |1 seconds.
 3) Overfrequency (OF) Protection a) Overfrequency protection is accomplished by sampling a phase of the external power voltage. There are two overfrequency setpoints: overfrequency 1 (XPOF1) and overfrequency 2 (XPOF2).
 1._The XPOF1 setpoint is 427.5 |2.5 Hz. If this condition persists for 1.2 |0.4 seconds, the XPC, GSSR, GSTR, and GHR-XP are de-energized. XPOF1 is intended to protect against overfrequency conditions but has a time delay long enough to prevent a trip during a transient condition.
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BOEING PROPRIETARY - Copyright (C) - Unpublished Work - See title page for details.
A
747-400 MAINTENANCE MANUAL
 2._The XPOF2 setpoint is 437.5 |2.5 Hz. If this condition persists for 30 |10 milliseconds, XPOF2 protective function deenergizes the XPC, GSSR, GSTR, and GR-XP. XPOF2 is intended to protect against severe fault conditions.
 4)  Underfrequency (UF) Protection
 a)  Underfrequency protection is accomplished by sampling phase C of the external power voltage. There are two underfrequency setpoints: underfrequency 1 (XPUF1) and underfrequency 2 (XPUF2).
 1._The XPUF1 setpoint is 372.5 |2.5 Hz. If this condition pesists for 1.2 |0.4 seconds, the XPC, GSSR, GSTR, and GHR-XP are de-energized.
 2._The XPUF2 setpoint is 352.5 |2.5 Hz. If this condition persists for 150 |50 milliseconds, the XPC, GSSR, GSTR, and GHR-XP are de-energized. XPUF2 is intended to protect against severe fault conditions.
 5)  Phase Sequence (o SEQ) Protection
 a)  The external power phase sequence protection indicates a phase sequence "ok" when the external power plug is connected and the phase sequence is A-B-C.
 (o) Synchronizing Bus Faults 1) Differential Current Protection (DP) a) The DP is accomplished through the differential phase current transfromers (DPCTs). A DP fault condition exists when a minimum differential current of 30 |5 amps is detected for a frequency between 370 and 430 Hz for 175 |25 milliseconds. The DP is handled by CPU differential current protection (DP CPU) or redundant differential current protection (RDNT DP). b) CPU Differential Current Protection (DP CPU). The hardware circuit for the DP CPU inputs to the CPU the level of the differential current detected. The CPU compares this differential current level to a threshold level set in software. If it is greater or equal to the threshold level, the CPU begins the time delay and inhibits the redundant differential current protection (RDNT DP).
 c)  The hardware circuit for the DP CPU inputs to the CPU the level of the differential current detected. The CPU compares this differential current level to a threshold level set in software. If it is greater or equal to the threshold level, the CPU begins the time delay and inhibits the redundant differential current protection (RDNT DP).
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