----------------------------------------------------------------------| | Adjustment | IGV Position | | Adjustment | Setting | (volts) | |-----------------------|----------------------|-----------------------| | | (5)* | 6.14 | |----------------------------------------------------------------------| | ECS std. day | (1) | 9.35 | | | (2) | 9.35 | | | (3) | 8.33 | | | (4) | 8.33 | | | (5)* | 8.33 | |----------------------------------------------------------------------| | | | Time (seconds) | | Cool-down Timer | (1) | 30 | | | (2)* | 60 | | | (3) | 90 | | | (4) | 90 | | | (5) | 90 | |----------------------------------------------------------------------| | | | Temperature (deg.F) | | EGT | (1) | -100 | | | (2) | -75 | | | (3) | -50 | | | (4) | -25 | | | (5)* | 0 | ----------------------------------------------------------------------
* values on delivery
 (5) Normal Shutdown Logic
 (a)
 Commanded Shutdown A normal APU shutdown is initiated when the operator pushes the APU MASTER SW from the ON to the OFF position. The ECB closes the IGVs to the min. position. The LCV closes and the SCV opens and the cool-down cycle of the APU starts.

 (b)
 Cool-down cycle The function of the cool-down timer is to delay the APU shutdown and to allow the APU to run for 60 seconds (depending on performance settings) at a low stabilized temperature at 100% speed (N). The cool-down cycle starts immediately when the ECB receives the CLOSED signal of the LCV. The AVAIL signal remains active, the generator remains loaded if selected.

 EFF : 001-003, 051-062, 49-61-00Page 39

Config-1 Aug 01/05
R
 CES  If the LCV was not in the OPEN position during the entire APU operation the cool-down timer is set to zero (0) seconds. The APU enters the shutdown state immediately when commanded to shutdown. If APU Bleed is set to OFF more than 60 seconds before the APU MATER SW is set to OFF the APU is shutdown immediately. If the APU MASTER SW is pushed before completion of the cool-down cycle the APU will shutdown only after the cooldown cycle is complete.

 (c)
 Overspeed Test After the end of the cool-down cycle, the ECB sends an overspeed test signal to the overspeed shutdown circuit. This causes the overspeed shutdown logic to start an APU shutdown by closing the fuel solenoid in the FCU. In this mode no protective shutdown is recorded by the ECB. After overspeed protection circuit is checked, the ECB attempts to modulate the fuel flow to keep the speed at 100 % rpm. If the ECB would be able to keep speed at 100 % rpm, it indicates that the fuel solenoid sticks in the open position.

 (d)
 APU Rolldown During APU rolldown the IGVs are set to the position corresponding to Bleed OFF until APU speed has dropped down to 80 % rpm. Then the IGVs are set to min. position. An APU re-start is possible at any time if the speed is more than 7 % rpm. When the speed has decreased to 7 % rpm the ECB commands the inlet door to close. Seconds after the speed is below 7 % rpm the ECB removes power from itself. The APU can be restarted at any time during the rolldown when the APU MASTER SW is set to ON and the START P/B is pushed. But the APU accelerates only when the APU speed has not fallen below 7% speed.

 (6) Protective Shutdown Logic The protective shutdown logic automatically shuts down the APU whenever continued operation of the APU would result in damage to the A/C, the APU or the ECB. The protective shutdown sequence is rapid:
 -
The cool-down cycle is suppressed,

 -
The ECB removes the power from the solenoids and torque motors

 -
The APU fault light is energized,

 -
The FAULT indication in the APU MASTER SW is energized,

 -
The APU rolls down.
 The shutdown reason is stored in the ECB memory.
 If the ECB operates in TSO mode (discrete input by A/C) most of the
 protective shutdowns are inhibited during flight, except the

 -Overspeed shutdown

 EFF : 001-003, 051-062, 49-61-00Page 40

Config-1 Aug 01/05
R
 CES  -Loss of Speed shutdown

 -Emergency shutdown.
 (a)
 Overspeed Shutdown The ECB has two independent possibility that protect the APU against overspeed.

 (b)
 ECB Shutdown The ECB BITE includes continuous self-monitoring of its circuitry and behavior. A fail-safe logic in the ECB will cause the ECB to command an APU shutdown if the:

 -Watchdog timer logic of the microprocessor fails
 -Overspeed detection circuits are faulty,
　
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