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時間:2011-04-01 08:50來源:藍天飛行翻譯 作者:航空
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During transmission, the output data is coupled to the VHF-3 transceiver data input line. This allows modulated outgoing data to be demodulated within the MU's demodulator circuit and compared to the original data transmitted.

 (i)  
If the demodulated data does not compare with the original transmitted data, a failure flag is set by the software program. The failure flag indicates a failure within the modulator/demodulator circuits.

 (j)  
The MU FAIL indicator will come on and the MU will switch from data mode to voice mode. The MU software will continue the wraparound test until power is turned off or the MU demodulator data agrees with the original data.

 

 (10)
 OOOI Interface


 (a)  The OOOI sensors provide ACARS with the following four events which are recorded/transmitted by the MU. 1) The Out event is defined as the last time the cabin door
 was closed and the parking brake released. 2) The In event is the time that the door is opened and the parking brake is set.
 EFFECTIVITYùùùùùùùùùùùùùùùùùùùùùùùùùùùùùù. ú

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BOEING PROPRIETARY - Copyright (C) - Unpublished Work - See title page for details.
A 737-300/400/500MAINTENANCE MANUAL
 3)  The Off event begins when the landing gear strut switch first annunciates extension of the strut. The Off event is declared after the strut is extended continuously for a preselected time by the MU.
 4)  The On event begins when the landing gear strut switch first annunciates compression of the strut following the Off event, however, the On event is declared after continuous strut compression occurs for a preselected time by the MU.
 (11)
 Memory

 (a)  The memory section of the MU employs RAM (random access memory) and EPROM (eraseable programmable read only memory). The RAMs are used to store temporary data required for ACARS operation. The EPROMs utilized by ACARS contain the software program.

 (12)
 Input/Output Address Decoder

 (a)  
The status of all input signals to the MU are read by the .P on the CRU IN line. For the .P to read the status of any given input signal, that signal must be fed to an input multiplexer, which in turn must be enabled by the correct input/output address decode signal.

 (b)  
For the .P to output a signal, a storage register must be set. These storage registers are 8-bit addressable latches. Each latch is enabled by an input/output decode address and signal CRU CLK. Data to be output by the .P will be present on the CRU OUT line.

 

 (13)
 Aircraft Identification Buffers

 (a)  
The airline name and registration mark of the aircraft is automatically inserted into each message transmitted by the MU. All incoming messages must include the same registration mark to be accepted by the MU.

 (b)  
The zero discrete inputs are jumpered to logic source zero.

 

 (14)
 BITE Logic

 (a)  
The BITE logic determines if the failure is MU or CU oriented.

 (b)  
ACARS is designed to automatically switch to voice operation when detecting a fault within the system.

 (c)  
The CU and MU each contain two fail indicators, one for CU FAIL and the other for MU FAIL. The indicators are driven from the MU because all BITE decision making hardware is located in the MU.

 (d)  
BITE hardware 1) Modulator output wrapped back to the demodulator input for

 


 monitoring of MU transmission. 2) Monitoring of line driver outputs to the CU. 3) Monitoring of input circuits from the CU to line receivers. 4) CU and MU fault indicator drivers. 5) MU push-to-test driver/monitor.
 EFFECTIVITYùùùùùùùùùùùùùùùùùùùùùùùùùùùùùù. ú

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BOEING PROPRIETARY - Copyright (C) - Unpublished Work - See title page for details.
A 737-300/400/500MAINTENANCE MANUAL
 (e)  The CU BITE suppport hardware provides the following
 capability.
 1) Data bit wraparound

 a)  The MU transmitted data stream contains a bit which is posted in the CU data stream. The bit is changed in a set pattern which is repeated every 16 transmissions. Every transmission exchange is evaluated by the .P which is continuously monitoring the switch status.
 
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