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BOEING PROPRIETARY - Copyright (C) - Unpublished Work - See title page for details.
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737-300/400/500MAINTENANCE MANUAL
 (aa) The entered longitude is compared to the last computed longitude stored in the IRU memory. If the difference is greater than one degree, the ALIGN annunciator will flash. If the second longitude entry is then taken as correct, the ALIGN annunciator goes out and the IRU enters the NAV mode if the remaining alignment completion conditions are satisfied. Once in the NAV mode, no further updates are accepted to the latitude or longitude by the IRU.
 (ab) When the mode select switch is in NAV or ALIGN position (ALIGN mode only), updating of the present position latitude and longitude is allowed from the FMCS CDU or from the ISDU. This, however, cannot occur once the IRS has entered the NAV mode. In the NAV mode, the IRS provides data on airplane attitude, outputs body rates and accelerations, and provides true and magnetic heading along with velocity vectors. Latitude and longitude are also output. The IRS accepts the latitude and longitude entered during the alignment mode as the starting point for the dead-reckoning computation.
 (ac) The attitude mode provides a rapid attitude/heading restart capability. The ATT mode is used if the IRS has had a total power shutdown or BITE has detected a failure in the NAV mode. ATT mode outputs are attitude/heading, rate, acceleration, vertical velocity, and altitude.
 (ad) The attitude mode is selected by switching the mode select switch to the ATT position. Magnetic heading inputs from the FMC are only accepted by the IRU while the mode select switch is in the ATT position.
 (ae) If the attitude mode is selected, the magnetic heading changes will track the platform heading changes after heading is entered.
 (af) The ARINC 429 busses supply identical information to the interface systems and the ISDU.
 (ag) Status discretes are sent to the IRS MSU.
 D. BITE
 (1)  Fault Monitoring
 (a)  AIRPLANES WITH IRU -109 AND PREVIOUS; IRU BITE detects failures that could cause erroneous outputs of heading, attitude, angular rates, or accelerations. If BITE detects any of these failures, it will cause the IRS valid output discrete to be set invalid. It will also light the FAULT indicator on the MSU and set the IRU fault ball. When a fault is detected, the output data is then transmitted with an invalid sign/status matrix. BCD data is removed from the data bus upon detection of a failure.
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BOEING PROPRIETARY - Copyright (C) - Unpublished Work - See title page for details.
 (b)

(c)

(d)

(e)

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737-300/400/500MAINTENANCE MANUAL
AIRPLANES WITH IRU -110 AND SUBSEQUENT; IRU BITE detects failures that could cause erroneous outputs of heading, attitude, angular rates, or accelerations. If BITE detects any of these failures, it will cause the IRS valid output discrete to be set invalid. It will also light the FAULT indicator on the MSU. When a fault is detected, the output data is then transmitted with an invalid sign/status matrix. BCD data is removed from the data bus upon detection of a failure.BITE monitors and tests the following: 1) Power supply 2) Laser gyros and accelerometers 3) Pitch rate output 4) Discrete Input/Output 5) Sensor electronics 6) CPU 7) Input receiver and output transmitters 8) Alignment, air data input 9) Derived latitude compared to entered latitude 10) Keyed in longitude compared to stored longitude 11) Memory operation 12) Instruction execution and data parity.AIRPLANES WITH IRU -109 AND PREVIOUS; The watch dog timer (WDT) monitors and detects failures that prevent the CPU from executing its program. The CPU is programmed to reset the WDT every 20 ms (50 Hz rate). If the CPU is unable to reset the WDT because of a computer failure, hangup, or memory failure, the WDT will time out. This will set the fault ball and light the FAULT annunciator. In addition, the analog pitch rate will be invalidated, and a fault word will be written into BITE memory.AIRPLANES WITH IRU -110 AND SUBSEQUENT; The watch dog timer (WDT) monitors and detects failures that prevent the CPU from executing its program. The CPU is programmed to reset the WDT every 20 ms (50 Hz rate). If the CPU is unable to reset the WDT because of a computer failure, hangup, or memory failure, the WDT will time out. This will light the FAULT annunciator. In addition, the analog pitch rate will be invalidated, and a fault word will be written into BITE memory.
　
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