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時(shí)間:2011-03-25 12:19來源:藍(lán)天飛行翻譯 作者:admin
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 -list of all the losses of systems/items of equipment resulting from the origin or primary failure
 -landing capability
 -possible procedures
 -performance limitations
 -title of systems for which maintenance actions have to be performed in the mean term (corresponding to class 2 failures)
 -list of warnings/cautions which may have been cancelled by the crew.
 1EFF : ALL 1 31-50-00Page 11 1 1 Feb 01/98 1 1 1CES 1R **ON A/C 001-049, 051-061, 101-105, 151-151,

 

 B. System Data Acquisition Concentrator (SDAC)
 (1)
 Computer architecture
 (Ref. Fig. 008, 009, 010, 011)


 -Mechanical structure All the digital boards are organized around a standardized bus : the Flight Computer System Bus (FCSB). This enables the use of standard boards (size, connections, etc.) and use of non-specialized backplane connectors (point-to-point connections). The unit is made up of standard cast modules, one module per board. These modules are picked up by a spacer on the front face and linked to the rear face by four longitudinal angle extrusions. The sides and covers of the casing can be removed from inside the extrusions.
 -Constitution of the unit
 The unit comprises:
 . one CPU board,
 . one memory module,
 . one ARINC automaton board,
 . two analog boards,
 . four input boards,
 . one converter input board,
 . one power supply module,
 . two lightning protection boards.


 (2)
 Functionnal description The two SDACs are identical and fully interchangeable. The two SDACs acquire from A/C systems malfunction/failure data corresponding to caution situations, and send them to the FWCs for generation of the corresponding alert and procedure messages. The two SDACs acquire then send to the 3 DMCs all A/C system signals necessary for display of systems information and engines monitoring secondary parameters through animated synoptic diagrams. All the signals (discrete, analog, digital) entering the SDACs are concentrated, converted in digital format and delivered on their output busses under the ARINC 429 digital serial transmission form. In addition, precautions taken on the analog signals voltage levels, on the monitoring of reference voltages and on the detection of short-circuit or open circuit conditions grant reliable information from the analog signals. Note that the analog to digital conversion made by the SDACs for all the A/C analog signals alleviate the task of the AIDS interface.


R 1EFF : 001-049, 051-061, 101-105, 151-151, 1 31-50-00Page 12 1 1 May 01/05 1 1 1CES 1


 SDAC Architecture - Sheet 1/4
 Figure 008

R 1EFF : 001-049, 051-061, 101-105, 151-151, 1 31-50-00Page 13/14 1 1 May 01/05 1 1 1CES
1


 SDAC Architecture - Sheet 2/4
 Figure 009

R 1EFF : 001-049, 051-061, 101-105, 151-151, 1 31-50-00Page 15/16 1 1 May 01/05 1 1 1CES
1


 SDAC Architecture - Sheet 3/4
 Figure 010

R 1EFF : 001-049, 051-061, 101-105, 151-151, 1 31-50-00Page 17/18 1 1 May 01/05 1 1 1CES
1


 SDAC Architecture - Sheet 4/4
 Figure 011

R 1EFF : 001-049, 051-061, 101-105, 151-151, 1 31-50-00Page 19 1 1 May 01/05 1 1 1CES 1R **ON A/C 062-099, 106-149, 152-199, 201-299, 301-399, 401-499,

 

 B. System Data Acquisition Concentrator (SDAC)
 (1) Mechanical Structure
 All the digital boards are organized around a standardized bus: the Standard Computer System Bus (SCSB).
 This enables the use of standard boards (size, connections etc.) and use of non-specialized backplane connectors (point-to-point connections). The unit is made up of standard cast modules, one module per board.
 These modules are picked up by a spacer on the front face and linked to the rear face by four longitudinal angle extrusions.
 The sides and covers of the casing can be removed from inside the extrusions.
 (2) Constitution of the Unit
 The unit comprises:

 -
1 CPU board

 -
1 memory module

 -
1 ANARINC (ANALOG + ARINC) board

 -
1 input board

 -
1 converter input board

 -
1 power supply board

 -
1 back mother card
 1 back lightning card

 

R 1EFF : 062-099, 106-149, 152-199, 201-299, 1 31-50-00Page 20 1301-399, 401-499, 1Aug 01/05 1 1 1CES 1 **ON A/C 001-049, 051-099, 101-105, 151-156, 201-209,


 C. Flight Warning Computer (FWC)
 (1) Computer architecture
 -Mechanical Structure All the digital boards are organized around a standardized system bus : the Flight Computer System Bus (FCSB). This enables the use of standard boards (size, connections, etc.) and the use of non-specialized backplane connectors (point-to-point connections).
 
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