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時間:2011-03-22 06:40來源:藍天飛行翻譯 作者:admin
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 - a 80186 microprocessor
 - a clock circuit
 - management circuits
 - a RAM used to save data for restart of the microprocessor after a
 short power supply cut.
 - an EPROM which constitutes the BITE memory
 - an I/O ARINC interface
 - a common RAM to store the ARINC words
 - the power supplies required for the operation of the board : plus
 or minus 15,5V.
 (2) ARINC board
 Not applicable.
 (3) CONTROL LOOP board
 The CONTROL LOOP board includes the 80C86 microprocessor and
 associated circuits.
 It forms the central processing unit of the slaving section of the
 computer.
 It performs the acquisition and processing of the inductive
 transducers and manages the transmission on an ARINC line.
 This board has the elements below :
 - a 80C86 microprocessor and associated circuits
 - a RAM used to save data during a short power cut
 - I/O circuits : PI0 8255
 - a RAM common to the two microprocessors 80C86 and 80186
 - the circuits for the acquisition and transmission of ARINC words
 - the circuits required for the acquisition of inductive transducers:
 a digital/analog converter (DAC), a multiplier unit and an
 integrator
 - amplifiers for transducer power supply.
 Not applicable.
 Not applicable.

 

 -generate the orders and analog command
 -re-read these orders to verify the correct operation of the digital/ analog converter
 -control a certain number of relays (transmission of orders to the servovalves, transmission of power supply to the inductive transducers)
 -provide the interface for 16 discrete inputs and 8 discrete outputs.
 6. Operation
_________
 A. General The Spoiler Elevator Computer (SEC) is organized around two channels : (Ref. Fig. 027)
 -
The command channel


 -
The monitor channel.
 The command channel receives analog sensor data, ARINC data and discrete
 signals in order to generate the flight commands used to drive the
 corresponding servo control.
 The connections between the computer and the servo control are of the
 analog type.
 The monitor channel independently receives the transducer data required
 to compute the control laws. Its role is to monitor the computations of
 the command channel and in particular the servo loop.
 The data exchange between the two channels, in order to perform the
 consolidation and synchronization operations, takes place on a high-speed
 ARINC bus.
 Each channel includes a digital part and an analog part.
 The digital part is built around two processors :

 

 -
a main processing unit for input/output system management and control law computation based on a 16-bit microprocessor (INTEL 80186).

 -
a digital control unit for high-speed servo loop computation, real-time alternative input acquisitions and servo control monitoring based on a 16-bit microprocessor (INTEL 80C86).


 The analog part converts the commands computed by the software into
 control currents.
 They are transmitted to the control surfaces as follows :

 -to the spoilers through COM relays for which the power supply and activation commands are generated by the MON channel (Ref. Fig. 028)
 1EFF : ALL 1 27-94-00Page 32 1 1 Aug 01/04R 1 1 1CES 1


 SEC - Internal General Architecture
 Figure 027
 1EFF :  ALL  1  27-94-00 Page 33 
1  1  Feb 01/98
 1  1
 1CES  1

 

 Spoiler Servovalve control
 Figure 028
 1EFF :  ALL  1  27-94-00 Page 34 
1  1  Feb 01/98
 1  1
 1CES  1

 

 -to the THS and elevators through MON relays in series with the COM
 relays. In addition, the currents are read and monitored by the software in the COM channel only.
 B. Functions Each channel performs five main functions :
 -input management
 -control law computation and synchronization
 -servo loop processing
 -engage logic
 - output management
 In addition, each channel has its own power supply.

 (1) Input management
 This part ensures acquisition of the input parameters.
 These take various forms :

 (a)
 analog DC signals from position transducers on the side stick, speedbrake control unit and throttle (ANI 1). Analog DC signal acquisition is shown (Ref. Fig. 029) An adaptation circuit receives the DC signals from position transducers. It amplifies and sends them to a multiplexer circuit. The multiplexer selects one input out of 32 and sends it to an A/D converter which transmits the information to the CPU board. A VREF circuit sends cold points of the potentiometers to the CPU 186 board which can detect, by software, an anomaly in the potentiometer supplies. The potentiometer power-supply circuit receives 28VDC and generates a 15VDC to supply the potentiometers. The acquisition principle of the analog DC accelerometer signals (ANI 4) is the same as for the potentiometers.
 
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