Switch Patterns ---------------------------------------------------DETENT 1 2 3 4 5 ----------------------------------------------------TRACK 1 XXXX XXXX ----------------------------------------------------TRACK 2 XXXXXXXXX ----------------------------------------------------TRACK 3 XXXXXXXXX ----------------------------------------------------TRACK 4 XXXXXXXXX ----------------------------------------------------TRACK 5 XXXXXXXXX ----------------------------------------------------OUT-OF-DETENT 1 2 3 4 ----------------------------------------------------
Table 1
 C. Slat and Flap Control Computer
 (Ref. Fig. 014, 015)
 ARINC 600 5 MCU cases contain the SFCC1 and the SFCC2. Each computer is the same and has two channels, one for the slats, the other one for the flaps. Each channel has two lanes (lane ONE and lane TWO) and include: - one Power Supply Unit (PSU) - one lane ONE Processor/Input Module - one lane TWO Processor Module - one ARINC/Synchro Module - one Output Module.
 The slat and flap channels together, have one common services module. Each channel has its own 28V DC power unit. One 28V DC input supplies the two PSUs which have no relation between them. Each PSU supplies its channel with the necessary internal voltages.
 The two lanes in each channel have different hardware and software:
 -
lane ONE has an INTEL 80C186 microprocessor (software programmed in assembler language)

 -
lane TWO has a MOTOROLA 68HC000 microprocessor (software programmed in Pascal language).

 The ARINC/Synchro Module has two functions:
 -ARINC 429 Communications
 -Synchro to digital conversion.
 The Output Module has three functions:

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 Slat and Flap Control Computer Figure 014
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 Slat and Flat Control Computer - Schematic Figure 015
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 -to collect and make an analysis of the data from lanes ONE and TWO - output data to the related valve blocks
 -move data between lanes ONE and TWO through the dual-ported Random Access Memory (RAM) and a common non-volatile store (EPROM).
 The Common Services Module supplies:
 -cross-channel communications through the RAM
 -WTB logic
 -system bus arbitration
 -LVDT oscillator.
 Each SFCC channel has an Installation-Coding input and an Operation Mode-Coding input. The Installation-Coding enables the SFCC to identify position 1 or 2 installation. The Operation Mode-Coding lets each channel find the difference between the operation modes related to aircraft versions:
 -
the flap operation mode 1 (relief enabled)

 -
the flap operation mode 2 (relief disabled)

 -
the slat operation mode 1 (Ref. 27-81-00)

 -
the slat operation mode 2 (Ref. 27-81-00).

 The flap operation modes 1 and 2 are related to the flap relief function. This function operates when the aircraft is at the flap relief speed. At this speed the flap relief function signals the flaps to retract a small amount to prevent too much load on the flaps. Because the flap loads are less than the maximum permitted loads, all aircraft are in the flap operation mode 2 (relief disabled). Pin programming disables/enables the flap relief function.
 D. Valve Block
 (Ref. Fig. 016)
 The valve block is a sub-component of the flaps PCU specified in (Ref. 27-54-00).
 E. Feedback Position Pick-Off Unit (FPPU)
 (Ref. Fig. 017)
 The FPPU has:
 -
a splined input shaft

 -
a spring-loaded locking plate

 -the reduction gears
 -a reduction gear housing
 -two synchro transmitters which work independently
 -a synchro cover
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 Valve Block Figure 016
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 Feedback Position Pick-Off Unit (FPPU) Figure 017
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 -an electrical connector block
 -a cover plate.
 The spring-loaded locking plate holds the splined input shaft from the removed FPPU. When the FPPU is installed in the aircraft, the mount of the FPPU pushes the locking plate away from the shaft splines. The input shaft moves the reduction gears which are in the reduction gear housing. The reduction gears turn the two synchro transmitters which are below the synchro cover.
　
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